sureCore Delivers 40nmULP Memory Compiler

The new 40nm ULP compiler supports synchronous single port SRAM with operating voltages ranging from 0.6 to 1.21 volts and memory capacities ranging from 8Kbytes to 576Kbytes with maximum word lengths of 72bits.

Previous test chip results revealed an up to 80% savings in dynamic power consumption and a 75% reduction in static power.

The design targets power-critical "keep alive" IoT, wearable and medical applications and delivers up to 50% dynamic power savings.   The SRAM itself is single rail and DVFS compatible. A rich suite of power management options include light sleep, deep sleep and power-down modes. The array is subdivided into up to eight banks that can be in independently active, retained or powered off modes. The compiler also provides Design-for-Test (DFT) and BIST support.

The sureCore low power SRAM IP is proving critical for a variety of IoT, wearable and medical applications that mandate keep alive memory.  It enables automated spoken word or phrase recognition and over or under temperature events.

sureCore's Ultra Low power SRAM enables computing at formerly unattainable low voltages levels of 0.6V. By combining low voltage operation with the leakage characteristics of the underlying process, sureCore has created an SRAM that supports operating speeds down to 20MHz (at 0.6V) and exceeds 300MHz at 1.1V.

"The 40nm ultra-low power process technology is, arguably, the cost effective sweet spot for many IoT, wearable and medical applications where long battery life is must," said sureCore's Executive Chairman, Guillaume d'Eyssautier.  "Mature nodes such as 40nm represent a sweet spot for IoT technical and business challenges and the sureCore Ultra Low power SRAM is quickly being acknowledged the leading power critical solution."

The company also has a 28nm FDSOI compiler and is currently working on a 22nm FDSOI Compiler, according to d'Eyssautier, who identified the technology as another popular IoT node.

About sureCore
sureCore Limited is an SRAM IP company based in Sheffield, UK, developing low power memories for current and next generation, silicon process technologies. Its award-winning, world-leading, low power SRAM design is process independent and variability tolerant, making it suitable for a wide range of technology nodes. This IP will help SoC developers meet both challenging power budgets and manufacturability constraints posed by leading edge process nodes.
www.sure-core.com

Photo - http://photos.prnewswire.com/prnh/20160601/374452-INFO

SOURCE sureCore Ltd.

Related Links

http://www.sure-core.com