Open-Silicon to Present on Solutions for Physical SoC Design Challenges at CDNLive Events in Bangalore and Tokyo

MILPITAS, Calif., Oct. 10, 2011 /PRNewswire/ -- Open-Silicon, Inc., a leading SoC design and semiconductor manufacturing company, announced today that the company will present technical papers about key SoC design issues at CDNLive in Tokyo, Japan on October 13, and CDNLive in Bangalore, India on October 19.

CDNLive Tokyo, Japan:

• Presentation: "Addressing the physical challenges and improving predictability using RC-Physical" by Tilak Miryala of Open-Silicon

When/Where: Thursday, October 13, 2011 at 2:30 – 3:05 p.m., Room: C at the Pan Pacific Yokohama Bay Hotel Tokyu, in Yokohama, Japan

CDNLive Bangalore, India:

• Presentation: "Efficient Clock Tree Analysis and Implementation for UDSM Nodes SoCs" by Seshagiri Yalavarthy and Raju Rakha of Open-Silicon

When/Where:  Wednesday, October 19, 2011, 12:00 – 12:30 p.m., Room: Vijayanagar II at Vivanta by Taj in Bangalore, India

• Presentation: "SI 'Prevention and Optimization' Flow for Clock and Signal Nets in UDSM Designs" by Jwalant Trivedi of Open-Silicon, and Tirendra Kumar of Cadence

When/Where:  Wednesday, October 19, 2011, 2:00 – 2:30 p.m., Room: Vijayanagar II at Vivanta by Taj in Bangalore, India

About Open-Silicon, Inc.

Open-Silicon is a leading semiconductor company focused on SoC realization for traditional ASIC, develop-to-spec, and derivative ICs. In support of the industry trend towards collaborative engineering and design-lite, Open-Silicon offers SoC architecture, system design, physical design, low-level software, and high-quality semiconductor manufacturing services with one of the world's broadest partner ecosystems for IC development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.

SOURCE Open-Silicon, Inc.

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