MediaTek Selects CLK Design Automation's Variance FX for AOCV
Leading Fabless Semiconductor Company adopts CLKDA's solution for systematic management of timing margin
LITTLETON, Mass., June 3, 2013 /PRNewswire/ -- CLK Design Automation today announced that MediaTek, Inc. has adopted Variance FX for the generation of timing derates. Advanced timing derates, such as AOCV and POCV, are an essential part of 28nm and 20nm physical design flows to systematically account for manufacturing process, voltage, and temperature (P/V/T) variance. Systematic margining enhances existing STA and physical optimization tools ability to improve timing closure and design performance.
MediaTek is one of the leaders in the adoption of AOCV and systematic margining methods to deliver high performance SOCs at 28nm and 20nm. CLK Design Automation's Variance FX delivers higher accuracy derates compared with traditional OCV sign-off. Variance FX helps MediaTek to avoid over-design, reduce hold time buffers, and achieve better performance, power, and area.
"With Variance FX, we are working with MediaTek to implement leading edge timing margin analysis," said Isadore Katz, President and CEO of CLK Design Automation. "We've been working closely with MediaTek to build high accuracy derate tables that capture process, temperature, and voltage sensitivity for their 28nm and 20nm libraries to help them deliver high performance designs."
Systematic Margining & Timing Derates
Systematic margining is a substantial improvement in modeling process, voltage, and temperature (P/ V/ T) variation compared with traditional methods. It can improve design performance and identify complex bugs that might have been masked with traditional margining methods. However, building complete, accurate derate tables to capture margin sensitivity for full libraries calls for millions of SPICE Monte Carlo runs, which is simply impractical even with unlimited compute resources and software licenses. Moreover, basic methods for generating derate tables such as AOCV are unnecessarily pessimistic. Because they rely on the worst case load and slew they do not reflect the way cells are actually used in a design, and may misdirect the optimization flow.
Variance FX: Advance Timing Derates & Systematic Margining Made Practical
Variance FX is the first complete, practical, turn-key solution that has the performance and accuracy needed to generate a full database of derate factors that captures process, voltage and temperature variation. Derate tables created by Variance FX can be used with all of the leading timing and optimization tools.
Variance FX has been extensively tested for accuracy and performance for all of the leading foundries and with all major libraries at 40nm, 28nm, 20nm, and beyond.
About CLK Design Automation
CLK Design Automation is the leader in systematic margining solutions for nanometer semiconductor designs. CLK DA was founded in 2004, and is backed by Morgenthaler Venture Partners and Atlas Ventures. Path FX and Variance FX are fast, accurate, and practical solutions for timing closure.
Amber, Path FX, and Variance FX are trademarks of CLK Design Automation. All other trademarks or registered trademarks are the property of their respective owners.
CONTACT:
Ahran Dunsmoor
CLK DA
[email protected]
978-486-1056 x208
SOURCE CLK Design Automation
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