Altera DOCSIS 3.1 Remote PHY Design Enables Distributed Cable Networks
FPGA-Based Solution Delivers State-of-the-art RF Performance and Empowers MSOs to Deploy Once, and Upgrade to Other Access Technologies Later, with a Path to Virtualization
SAN JOSE, Calif., Oct. 8, 2015 /PRNewswire/ -- Altera Corporation (NASDAQ: ALTR) is attending the SCTE Cable Expo in New Orleans, October 13-16 (Booth #3135), to demonstrate a new, flexible and upgradeable silicon solution for multi-service operators (MSOs) that enables the next-generation of cable architectures at the same low power consumption levels as ASICs. The Altera DOCSIS Remote (MAC) PHY design, which is being demonstrated with partners Analog Devices, and Capacicom, enables cable operators to more efficiently and cost-effectively meet the ever-increasing need to segment cable networks, driven by the demand of high-speed Internet, unicast 4K video and other multimedia content.
The solution uses Altera Arria® 10 FPGAs and Analog Devices' class-leading digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), combined with Capacicom's MAC and PHY implementation, resulting in state-of-the-art radio frequency (RF) performance.
Altera's distributed CCAP architecture (DCA) solutions support both the legacy DOCSIS 3.0 standard and the new industry standard for cable, DOCSIS 3.1. The latter increases network capacity through the ability to transmit up to 50 percent more data over the same spectrum on existing hybrid fiber-coaxial (HFC) networks, delivering consumer broadband services up to 10 Gbps downstream, and more than 2 Gbps upstream, reducing network delays and improving responsiveness for multi-media applications, such as gaming.
The Altera DCA solution aligns with operator needs to evolve from HFC to DCA in a managed and flexible manner through Altera's longer term alignment with x86+FPGA platforms, enabling the dynamic segmentation of CCAP as either embedded in the node as an integrated headend or with x86+FPGA as virtualized modules in a datacenter.
"The pent-up demand for new CCAP (converged cable access platform) - capable equipment is evident in the early volume deployments of CCAP gear, and we expect the upward trend in combined CMTS and CCAP channel shipments to continue as operators prepare their networks for DOCSIS 3.1 and remote PHY (physical layer) architectures," notes Jeff Heynen, IHS Research principal analyst for broadband access and pay TV.
"With today's Altera FPGA portfolio and onward technology roadmap coupled with Capacicom's substantial experience in DOCSIS PHY and MAC layers, ADI has now found the perfect combination of partners to extend its leadership in high-performance analog into cable infrastructure solutions," said Carlton Lane, Analog Devices cable solutions manager. "ADI, Altera and Capacicom have set up a long-term collaboration to create the semiconductor industry reference platform for R - (MAC) PHY, with a continuing roadmap commitment to the lowest power consumption and cost per port."
"Altera's DCA solutions help operators meet the demand for higher speed access and increased network efficiency, using the new DOCSIS 3.1 standard, a necessity for cost effectiveness," said Umar Mughal, Altera director of the broadcast and cable business unit. "Our ongoing technology roadmap will enable us to deliver further, and more dramatic power savings in the node, which for the first time, makes full-spectrum, full unicast 4x4 port densities per node viable; dramatically reducing both the MSO's Capex and Opex cost per RF port."
About Arria 10 FPGAs and SoCs
Arria 10 FPGAs and SoCs deliver the highest performance at 20 nm, offering a one speed-grade performance advantage over competing 20 nm devices. Arria 10 FPGAs and SoCs are up to 40 percent lower power than previous generation FPGAs and SoCs and feature the industry's only hard floating-point digital signal processing (DSP) blocks with speeds up to 1,500 giga floating-point operations per second (GFLOPS). Arria 10 SoCs are the industry's only 20 nm SoC FPGAs, featuring an integrated dual-core ARM® Cortex®-A9 hard processor system. For more information about Arria 10 FPGAs and SoCs, visit www.altera.com/arria10.
Availability
The Altera DOCSIS Remote (MAC) PHY design is now available. More information can be obtained from Altera by going to www.altera.com/broadcast.
About Altera
Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGA, SoC, CPLD, and complementary technologies, such as power solutions to provide high-value solutions to customers worldwide. Visit Altera at www.altera.com.
ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/legal.
Editor Contact:
Karin Taylor
Altera Corporation
(408) 544-8207
[email protected]
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SOURCE Altera Corporation
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